Valerie Taylor

birth:

place:

Bachelors (1985) and Masters (1986), degrees in Electrical Engineering from Purdue University

PhD (1991) in Electrical Engineering and Computer Sciences from the University of California at Berkeley

Full Professorof Electrical and Computer Engineering, Northwestern University

URL: http://www.cs.tamu.edu/people/faculty/taylor
email: taylor@cs.tamu.edu

As a young girl, growing up in Chicago, Valerie Taylor didn't have to look far to find a scientist role model: her father had his own scientific company and brought her in to work with him on weekends. As she watched her father work,

Valerie decided that she wanted to be a scientist, too.In grade school she thought "My initials were VET, so I thought I should be a veterinarian," she said. "But I decided medicine wasn't for me. My dad was an engineer and I sometimes went to work with him, so that was a major influence." Dr. Taylor's educational path took her from chemical engineering to electrical engineering, a choice that was at times discouraging but that she stuck with nevertheless. She completed her master's degree but turned down a Ph.D. fellowship: "I wasn't sure if I would like academia, but my advisor kept telling me, 'Oh, you've got to become a professor, you've got to go into teaching! Women need role models!' My shoulders felt so heavy," she laughed. Fortunately, she found academia to her liking.
At Northwestern University in 1991 Valerie Taylor was appointed Assistant Professor of Electrical and Eomputer Engineering. She received tenure and was appointed Associate Professor in 1997.

In 2002 Valerie Taylor became Department Head and Stewart & Stevenson Professor of Computer Science at Texas A&M University.

Dr. Taylor's research interests include performance of parallel scientific applications, computer architecture, and visual supercomputing environments. In 1993 she received the National Science Foundation's Young Investigator Award. She was awarded a patent for her dissertation work related to computer architecture for scientific computing. In 1994 she was a member of one of eight teams selected by the National Science Foundation (NSF) to develop new ultra-fast computers known as "petaflop" computers, which will perform 1,000 times faster than the teraflop, or one trillion operations per second, computers in use today. The petaflop computer will employs a hierarchical architecture, using off-the-shelf processors with different speeds. At the top are a few processors that are very fast. Moving "down" the structure are many more parallel processors, but of slower speed for cost-efficiency. The goal is to design the system so that the processors all work together at these nearly inconceivable speeds.

Off campus, Valerie volunteers her time, as a mentor, in a housing project in downtown Chicago. There she teaches science and mathematics to children. While she hopes her work with these youngsters will make some difference in their lives, Valerie also says that she gets a lot of motivation from the community. She has received support from organizations designed to help minority students, and now she wants to give something back. Her father, who served as her role model when she was a child, is now happy to take direction from his daughter, the scientist.

She was awarded a patent for her dissertation work related to computer architecture for scientific computing. In 1993 received the National Science Foundation's Young Investigator Award. Award winners are eligible for funding of up to $100,000. They receive a $25,000 annual research grant for three years from the NSF and up to $37,500 in yearly matching funds for industrial financial support secured by the award winners. 1997, associate professor of electrical and computer engineering Valerie Taylor is a member of one of eight teams selected by the National Science Foundation (NSF) to develop new ultra-fast computers known as "petaflop" computers, which will perform 1,000 times faster than the teraflop, or one trillion operations per second, computers in use today.

RECENT PUBLICATIONS

J. Chen, V. Taylor, "ParaPART: Parallel Mesh Partitioning Tool for Distributed Systems", in IRREGULAR'99, Sixth International Workshop on Solging Irregularly Structured Problems in Parallel, in Conjunction with IEEE IPPS/SPDP'99 (13th International Parallel Processing Symposium), San Juan, Puerto Rico, April 1999.

J. Chen, V. Taylor, "Mesh Partitioning for Distributed Systems: Exploring Optimal Number of Partitions with Local and Remote Communication", submitted to the 1999 SIAM Conference on Parallel Processing.

J. Chen, V. Taylor, "Mesh Partitioning for Distributed Systems", in Proceedings of Seventh IEEE International Symposium on High Performance Distributed Computing, Chicago, IL, July 1998.

J. Chen, V. Taylor, T. Canfield, and R. Stevens, "A Decomposition Method for Efficient Use of Distributed Supercomputers", in Proceedings of International Conference on Application Specific Systems, Architectures, and Processors, Chicago, IL, August, 1996

We had help from Lenore Blum in preparing this web page.

Computer Scientists of the African Diaspora

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State University of New York at Buffalo

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